#ifndef COMPILE_H
#include "COMPILE.H"
#endif
#ifdef MEDIA413_A20ED_A20E_A20F_A20G_A21E_A22E_A22G
unsigned char* G1002_puc_ViewportSourceBitPlane0;
unsigned char* G1003_puc_ViewportSourceBitPlane1;
unsigned char* G1004_puc_ViewportSourceBitPlane2;
unsigned char* G1005_puc_ViewportSourceBitPlane3;
unsigned char* G1006_puc_ViewportDestinationBitPlane0;
unsigned char* G1007_puc_ViewportDestinationBitPlane1;
unsigned char* G1008_puc_ViewportDestinationBitPlane2;
unsigned char* G1009_puc_ViewportDestinationBitPlane3;


void F0564_VIEWPORT_InitializeBitPlanes(
P0985_puc_Bitmap, P0986_puc_Bitmap)
unsigned char* P0985_puc_Bitmap SEPARATOR
unsigned char* P0986_puc_Bitmap FINAL_SEPARATOR
{
        G1002_puc_ViewportSourceBitPlane0 = P0985_puc_Bitmap;
        G1003_puc_ViewportSourceBitPlane1 = G1002_puc_ViewportSourceBitPlane0 + M091_BITPLANE_SIZE(224, 136);
        G1004_puc_ViewportSourceBitPlane2 = G1002_puc_ViewportSourceBitPlane0 + M091_BITPLANE_SIZE(224, 136) * 2;
        G1005_puc_ViewportSourceBitPlane3 = G1002_puc_ViewportSourceBitPlane0 + M091_BITPLANE_SIZE(224, 136) * 3;
        G1006_puc_ViewportDestinationBitPlane0 = P0986_puc_Bitmap + M091_BITPLANE_SIZE(320, 33); /* The viewport starts on the first pixel of line 33 */
        G1007_puc_ViewportDestinationBitPlane1 = G1006_puc_ViewportDestinationBitPlane0 + M091_BITPLANE_SIZE(320, 200);
        G1008_puc_ViewportDestinationBitPlane2 = G1006_puc_ViewportDestinationBitPlane0 + M091_BITPLANE_SIZE(320, 200) * 2;
        G1009_puc_ViewportDestinationBitPlane3 = G1006_puc_ViewportDestinationBitPlane0 + M091_BITPLANE_SIZE(320, 200) * 3;
}

void F0565_VIEWPORT_SetPalette(
P0987_puc_Palette_MiddleScreen, P0988_puc_Palette_TopAndBottomScreen)
unsigned char* P0987_puc_Palette_MiddleScreen       SEPARATOR
unsigned char* P0988_puc_Palette_TopAndBottomScreen FINAL_SEPARATOR
{
        WaitBlit();
        OwnBlitter();
        Forbid();
        if (VBeamPos() >= 200) {
                M526_WaitVerticalBlank();
        }
        while (VBeamPos() < 200);
        if (P0987_puc_Palette_MiddleScreen && P0988_puc_Palette_TopAndBottomScreen) {
                F0508_AMIGA_BuildPaletteChangeCopperList(P0987_puc_Palette_MiddleScreen, P0988_puc_Palette_TopAndBottomScreen);
                while (VBeamPos() < 200);
        }
        F0566_VIEWPORT_BlitToScreen();
        DisownBlitter();
        Permit();
}

void F0566_VIEWPORT_BlitToScreen(
)
{
        /* Copy bitplane 0 */
        custom.bltcon0 = SRCA | DEST | A_TO_D; /* 0x09F0 Blitter control register. Copy whole bitplane from A to D */
        custom.bltcon1 = 0;
        custom.bltafwm = 0xFFFF; /* Blitter first work mask for DMA channel A (source). 0xFFFF = do not mask any bit */
        custom.bltalwm = 0xFFFF; /* Blitter last work mask for DMA channel A (source). 0xFFFF = do not mask any bit */
        custom.bltapt = (APTR)G1002_puc_ViewportSourceBitPlane0;
        custom.bltamod = 0; /* Blitter Modulo register for DMA channel A (source). (Byte count added to address after blitting each line). 0 because blitting the whole source bitplane */
        custom.bltdpt = (APTR)G1006_puc_ViewportDestinationBitPlane0;
        custom.bltdmod = M091_BITPLANE_SIZE(320 - 224, 1); /* Blitter Modulo register for DMA channel D (Destination). (Byte count added to address after blitting each line). The part of the screen at the right of the viewport is 12 bytes large in each bitplane: (320 - 224) / 8 */
        custom.bltsize = M092_BLITSIZE(224 / 16, 136); /* 0x220E Blitter blit size register. Writing this register starts the blit operation. Bits 0-5: Width in words, Bits 6-15: height in lines */
        WaitBlit();
        /* Copy bitplane 1 */
        custom.bltcon0 = SRCA | DEST | A_TO_D; /* 0x09F0 Blitter control register. Copy whole bitplane from A to D */
        custom.bltcon1 = 0;
        custom.bltafwm = 0xFFFF; /* Blitter first work mask for DMA channel A (source). 0xFFFF = do not mask any bit */
        custom.bltalwm = 0xFFFF; /* Blitter last work mask for DMA channel A (source). 0xFFFF = do not mask any bit */
        custom.bltapt = (APTR)G1003_puc_ViewportSourceBitPlane1;
        custom.bltamod = 0; /* Blitter Modulo register for DMA channel A (source). (Byte count added to address after blitting each line). 0 because blitting the whole source bitplane */
        custom.bltdpt = (APTR)G1007_puc_ViewportDestinationBitPlane1;
        custom.bltdmod = M091_BITPLANE_SIZE(320 - 224, 1); /* Blitter Modulo register for DMA channel D (Destination). (Byte count added to address after blitting each line). The part of the screen at the right of the viewport is 12 bytes large in each bitplane: (320 - 224) / 8 */
        custom.bltsize = M092_BLITSIZE(224 / 16, 136); /* 0x220E Blitter blit size register. Writing this register starts the blit operation. Bits 0-5: Width in words, Bits 6-15: height in lines */
        WaitBlit();
        /* Copy bitplane 2 */
        custom.bltcon0 = SRCA | DEST | A_TO_D; /* 0x09F0 Blitter control register. Copy whole bitplane from A to D */
        custom.bltcon1 = 0;
        custom.bltafwm = 0xFFFF; /* Blitter first work mask for DMA channel A (source). 0xFFFF = do not mask any bit */
        custom.bltalwm = 0xFFFF; /* Blitter last work mask for DMA channel A (source). 0xFFFF = do not mask any bit */
        custom.bltapt = (APTR)G1004_puc_ViewportSourceBitPlane2;
        custom.bltamod = 0; /* Blitter Modulo register for DMA channel A (source). (Byte count added to address after blitting each line). 0 because blitting the whole source bitplane */
        custom.bltdpt = (APTR)G1008_puc_ViewportDestinationBitPlane2;
        custom.bltdmod = M091_BITPLANE_SIZE(320 - 224, 1); /* Blitter Modulo register for DMA channel D (Destination). (Byte count added to address after blitting each line). The part of the screen at the right of the viewport is 12 bytes large in each bitplane: (320 - 224) / 8 */
        custom.bltsize = M092_BLITSIZE(224 / 16, 136); /* 0x220E Blitter blit size register. Writing this register starts the blit operation. Bits 0-5: Width in words, Bits 6-15: height in lines */
        WaitBlit();
        /* Copy bitplane 3 */
        custom.bltcon0 = SRCA | DEST | A_TO_D; /* 0x09F0 Blitter control register. Copy whole bitplane from A to D */
        custom.bltcon1 = 0;
        custom.bltafwm = 0xFFFF; /* Blitter first work mask for DMA channel A (source). 0xFFFF = do not mask any bit */
        custom.bltalwm = 0xFFFF; /* Blitter last work mask for DMA channel A (source). 0xFFFF = do not mask any bit */
        custom.bltapt = (APTR)G1005_puc_ViewportSourceBitPlane3;
        custom.bltamod = 0; /* Blitter Modulo register for DMA channel A (source). (Byte count added to address after blitting each line). 0 because blitting the whole source bitplane */
        custom.bltdpt = (APTR)G1009_puc_ViewportDestinationBitPlane3;
        custom.bltdmod = M091_BITPLANE_SIZE(320 - 224, 1); /* Blitter Modulo register for DMA channel D (Destination). (Byte count added to address after blitting each line). The part of the screen at the right of the viewport is 12 bytes large in each bitplane: (320 - 224) / 8 */
        custom.bltsize = M092_BLITSIZE(224 / 16, 136); /* 0x220E Blitter blit size register. Writing this register starts the blit operation. Bits 0-5: Width in words, Bits 6-15: height in lines */
        WaitBlit();
}
#endif
